The present disclosure relates to semiconductor processing methods, and particularly to methods for shrinking lateral dimensions employing an etch that transfers lithographic dimensions in a lithographic pattern in a photoresist layer into sublithographic dimensions in a metallic hard mask, and structures for effecting the same.
As semiconductor devices continue to shrink in dimension, the limits of capabilities of current deep ultraviolet (DUV) lithographic tools are reached around a pitch dimension of about 65 nm. While extreme ultra-violet (EUV) lithography tools under development target to print lithographic patterns having a pitch less than 65 nm, such EUV lithographic tools are still under development, and are not commercially available.
Various unconventional lithographic technologies known in the art include a pitch split sidewall image transfer (SIT) process and a double patterning process. However, such lithographic technologies require multiple lithographic exposures, and thereby increase processing cost and processing time.